! The following codes apply in the list of Opcodes below. ! RR, RX, RS, RRE, SS, SSE, S, SI are instruction formats. ! C means condition code is set. The numbers e.g. 7-24 are reference page ! numbers in SA22-7085-0 370-XA Priciples of Operation. ! Non-XA (370 only) instructions are marked *370*. {ADD } %const %integer A = x'5A' {RX C 7-8} {ADD } %const %integer AR = x'1A' {RR C 7-8} {ADD DECIMAL } %const %integer AP = x'FA' {SS C 8-5} {ADD HALFWORD } %const %integer AH = x'4A' {RX C 7-8} {ADD LOGICAL } %const %integer AL = x'5E' {RX C 7-9} {ADD LOGICAL } %const %integer ALR = x'1E' {RR 7-9} {ADD NORMALISED (LONG) } %const %integer ADR = x'2A' {RR C 9-6} {ADD NORMALISED (SHORT) } %const %integer AE = x'7A' {RX C 9-6} {ADD NORMALISED (SHORT) } %const %integer AER = x'3A' {RR C 9-6} {ADD NORMALISED (EXTENDED) } %const %integer AXR = x'36' {RR C 9-6} {ADD NORMALISED (LONG) } %const %integer AD = x'6A' {RX C 9-6} {ADD UNNORMALISED (SHORT) } %const %integer AUR = x'3E' {RR C 9-7} {ADD UNNORMALISED (SHORT) } %const %integer AU = x'7E' {RX C 9-7} {ADD UNNORMALISED (LONG) } %const %integer AW = x'6E' {RX C 9-7} {ADD UNNORMALISED (LONG) } %const %integer AWR = x'2E' {RR C 9-7} {AND } %const %integer N = x'54' {RX C 7-9} {AND } %const %integer NR = x'14' {RR C 7-9} {AND (CHARACTER) } %const %integer NC = x'D4' {SS C 7-9} {AND (IMMEDIATE) } %const %integer NI = x'94' {SI C 7-9} {BRANCH AND LINK } %const %integer BAL = x'45' {RX 7-10} {BRANCH AND LINK } %const %integer BALR = x'05' {RR 7-10} {BRANCH AND SAVE AND SET MODE } %const %integer BASSM= x'0C' {RR 7-11} {BRANCH AND SAVE } %const %integer BAS = x'4D' {RX 7-10} {BRANCH AND SAVE } %const %integer BASR = x'0D' {RR 7-10} {BRANCH AND SET MODE } %const %integer BSM = x'0B' {RR 7-11} {BRANCH ON CONDITION } %const %integer BCR = x'07' {RR 7-12} {BRANCH ON CONDITION } %const %integer BC = x'47' {RX 7-12} {BRANCH ON COUNT } %const %integer BCT = x'46' {RX 7-13} {BRANCH ON COUNT } %const %integer BCTR = x'06' {RR 7-13} {BRANCH ON INDEX HIGH } %const %integer BXH = x'86' {RS 7-13} {BRANCH ON INDEX LOW OR EQUAL } %const %integer BXLE = x'87' {RS 7-13} {CLEAR CHANNEL } %const %integer CLRCH = x'9F01' {S C *370*} {CLEAR I/O } %const %integer CLRIO = x'9D01' {S C *370*} {CLEAR SUBCHANNEL } %const %integer CSCH = x'B230' {S C 14-3} {COMPARE } %const %integer CR = x'19' {RR C 7-14} {COMPARE } %const %integer C = x'59' {RX C 7-14} {COMPARE (LONG) } %const %integer CD = x'69' {RX C 9-8} {COMPARE (LONG) } %const %integer CDR = x'29' {RR C 9-8} {COMPARE (SHORT) } %const %integer CE = x'79' {RX C 9-8} {COMPARE (SHORT) } %const %integer CER = x'39' {RR C 9-8} {COMPARE AND SWAP } %const %integer CS = x'BA' {RS C 7-14} {COMPARE DECIMAL } %const %integer CP = x'F9' {SS C 8-5} {COMPARE DOUBLE AND SWAP } %const %integer CDS = x'BB' {RS C 7-14} {COMPARE HALFWORD } %const %integer CH = x'49' {RX C 7-16} {COMPARE LOGICAL } %const %integer CLR = x'15' {RR C 7-16} {COMPARE LOGICAL (CHARACTER) } %const %integer CLC = x'D5' {SS C 7-16} {COMPARE LOGICAL } %const %integer CL = x'55' {RX C 7-16} {COMPARE LOGICAL (IMMEDIATE) } %const %integer CLI = x'95' {SI C 7-16} {COMPARE LOGICAL LONG } %const %integer CLCL = x'0F' {RR C 7-17} {COMPARE LOGICAL CHARACTERS UNDER MASK } %const %integer CLM= x'BD' {RS C 7-17} {CONVERT TO BINARY } %const %integer CVB = x'4F' {RX 7-19} {CONVERT TO DECIMAL } %const %integer CVD = x'4E' {RX 7-20} {DIAGNOSE } %const %integer DG = x'83' { S 10-14} {DIVIDE } %const %integer D = x'5D' {RX 7-20} {DIVIDE } %const %integer DR = x'1D' {RR 7-20} {DIVIDE (EXTENDED) } %const %integer DXR = x'B22D' {RRE 9-8} {DIVIDE (LONG) } %const %integer DDR = x'2D' {RR 9-8} {DIVIDE (LONG) } %const %integer DD = x'6D' {RX 9-8} {DIVIDE (SHORT) } %const %integer DE = x'7D' {RX 9-8} {DIVIDE (SHORT) } %const %integer DER = x'3D' {RR 9-8} {DIVIDE DECIMAL } %const %integer DP = x'FD' {SS 8-5} {EDIT } %const %integer ED = x'DE' {SS C 8-6} {EDIT AND MARK } %const %integer EDMK = x'DF' {SS C 8-9} {EXCLUSIVE OR } %const %integer X = x'57' {RX C 7-21} {EXCLUSIVE OR } %const %integer XR = x'17' {RR C 7-21} {EXCLUSIVE OR (CHARACTER) } %const %integer XC = x'D7' {SS C 7-21} {EXCLUSIVE OR (IMMEDIATE) } %const %integer XI = x'97' {SI C 7-21} {EXECUTE } %const %integer EX = x'44' {RX 7-22} {EXTRACT PRIMARY ASN } %const %integer EPAR = x'B226' {RRE 10-5} {EXTRACT SECONDARY ASN } %const %integer ESAR = x'B227' {RRE 10-5} {HALT DEVICE } %const %integer HDV = x'9E01' {S C *370*} {HALT I/O } %const %integer HIO = x'9E00' {S C *370*} {HALT SUBCHANNEL } %const %integer HSCH = x'B231' {S C 14-4} {HALVE (LONG) } %const %integer HDR = x'24' {RR 9-10} {HALVE (SHORT) } %const %integer HER = x'34' {RR 9-10} {INSERT ADDRESS SPACE CONTROL } %const %integer IAC = x'B224' {RRE C 10-6} {INSERT CHARACTER } %const %integer IC = x'43' {RX 7-23} {INSERT CHARACTERS UNDER MASK } %const %integer ICM = x'BF' {RS C 7-23} {INSERT PROGRAM MASK } %const %integer IPM = x'B222' {RRE 7-23} {INSERT PSW KEY } %const %integer IPK = x'B20B' {S 10-7} {INSERT STORAGE KEY } %const %integer ISK = x'09' {RR *370*} {INSERT STORAGE KEY EXTENDED } %const %integer ISKE = x'B229' {RRE 10-7} {INSERT VIRTUAL STORAGE KEY } %const %integer IVSK = x'B223' {RRE 10-7} {INVALIDATE PAGE TABLE ENTRY } %const %integer IPTE = x'B221' {RRE 10-8} {LOAD } %const %integer L = x'58' {RX 7-24} {LOAD } %const %integer LR = x'18' {RR 7-24} {LOAD (LONG) } %const %integer LD = x'68' {RX 9-10} {LOAD (LONG) } %const %integer LDR = x'28' {RR 9-10} {LOAD (SHORT) } %const %integer LE = x'78' {RX 9-10} {LOAD (SHORT) } %const %integer LER = x'38' {RR 9-10} {LOAD ADDRESS } %const %integer LA = x'41' {RX 7-24} {LOAD ADDRESS SPACE PARAMETERS } %const %integer LASP = x'E500' {SSE C 10-10} {LOAD AND TEST } %const %integer LTR = x'12' {RR C 7-24} {LOAD AND TEST (SHORT) } %const %integer LTER = x'32' {RR C 9-11} {LOAD AND TEST (LONG) } %const %integer LTDR = x'22' {RR C 9-11} {LOAD COMPLEMENT } %const %integer LCDR = x'23' {RR C 9-11} {LOAD COMPLEMENT (SHORT) } %const %integer LCER = x'33' {RR C 9-11} {LOAD COMPLEMENT } %const %integer LCR = x'13' {RR C 7-24} {LOAD CONTROL } %const %integer LCTL = x'B7' {RS 10-17} {LOAD HALFWORD } %const %integer LH = x'48' {RX 7-25} {LOAD MULTIPLE } %const %integer LM = x'98' {RS 7-25} {LOAD NEGATIVE } %const %integer LNR = x'11' {RR C 7-25} {LOAD NEGATIVE (LONG) } %const %integer LNDR = x'21' {RR C 9-11} {LOAD NEGATIVE (SHORT) } %const %integer LNER = x'31' {RR C 9-11} {LOAD POSITIVE } %const %integer LPR = x'10' {RR C 7-26} {LOAD POSITIVE (SHORT) } %const %integer LPER = x'30' {RR C 9-12} {LOAD POSITIVE (LONG) } %const %integer LPDR = x'20' {RR C 9-12} {LOAD PSW } %const %integer LPSW = x'82' {S 10-17} {LOAD REAL ADDRESS } %const %integer LRA = x'B1' {RX C 10-18} {LOAD ROUNDED (EXTENDED TO LONG)} %const %integer LRDR= x'25' {RR 9-12} {LOAD ROUNDED (LONG TO SHORT) } %const %integer LRER = x'35' {RR 9-12} {MODIFY SUBCHANNEL } %const %integer MSCH = x'B232' {S C 14-6} {MONITOR CALL } %const %integer MC = x'AF' {SI 7-26} {MOVE (CHARACTER) } %const %integer MVC = x'D2' {SS 7-27} {MOVE (IMMEDIATE) } %const %integer MVI = x'92' {SI 7-27} {MOVE LONG } %const %integer MVCL = x'0E' {RR C 7-27} {MOVE NUMERICS } %const %integer MVN = x'D1' {SS 7-30} {MOVE TO PRIMARY } %const %integer MVCP = x'DA' {SS C 10-19} {MOVE TO SECONDARY } %const %integer MVCS = x'DB' {SS C 10-19} {MOVE WITH KEY } %const %integer MVCK = x'D9' {SS C 10-20} {MOVE WITH OFFSET } %const %integer MVO = x'F1' {SS 7-31} {MOVE ZONES } %const %integer MVZ = x'D3' {SS 7-31} {MULITPLY (SHORT TO LONG) } %const %integer ME = x'7C' {RX 9-13} {MULTIPLY } %const %integer MR = x'1C' {RR 7-32} {MULTIPLY } %const %integer M = x'5C' {RX 7-32} {MULTIPLY (EXTENDED) } %const %integer MXR = x'26' {RR 9-13} {MULTIPLY (LONG TO EXTENDED) } %const %integer MXDR = x'27' {RR 9-13} {MULTIPLY (LONG TO EXTENDED) } %const %integer MXD = x'67' {RX 9-13} {MULTIPLY (LONG) } %const %integer MDR = x'2C' {RR 9-13} {MULTIPLY (LONG) } %const %integer MD = x'6C' {RX 9-13} {MULTIPLY (SHORT TO LONG) } %const %integer MER = x'3C' {RR 9-13} {MULTIPLY DECIMAL } %const %integer MP = x'FC' {SS 8-10} {MULTIPLY HALFWORD } %const %integer MH = x'4C' {RX 7-32} {OR } %const %integer OR = x'16' {RR C 7-33} {OR } %const %integer O = x'56' {RX C 7-33} {OR (CHARACTER) } %const %integer OC = x'D6' {SS C 7-33} {OR (IMMEDIATE) } %const %integer OI = x'96' {SI C 7-33} {PACK } %const %integer PACK = x'F2' {SS 7-33} {PROGRAM CALL } %const %integer PC = x'B218' {S 10-22} {PROGRAM TRANSFER } %const %integer PT = x'B228' {RRE 10-28} {PURGE PAGE } %const %integer PPG = x'B2F0' {S *Amdahl V7*} {PURGE SINGLE USER } %const %integer PSU = x'B2F1' {S *Amdahl V7*} {PURGE TLB } %const %integer PTLB = x'B20D' {S 10-33} {RESET CHANNEL PATH } %const %integer RCHP = x'B23B' {S C 14-6} {RESET REFERENCE BIT } %const %integer RRB = x'B213' {S C *370*} {RESET REFERENCE BIT EXTENDED } %const %integer RRBE = x'B22A' {RRE C 10-33} {RESUME I/O } %const %integer RIO = x'9C02' {S C *370*} {RESUME SUBCHANNEL } %const %integer RSCH = x'B238' {S C 14-8} {SET ADDRESS LIMIT } %const %integer SAL = x'B237' {S 14-9} {SET ADDRESS SPACE CONTROL } %const %integer SAC = x'B219' {S 10-33} {SET CHANNEL MONITOR } %const %integer SCHM = x'B23C' {S 14-10} {SET CLOCK } %const %integer SCK = x'B204' {S C 10-34} {SET COCK COMPARATOR } %const %integer SCKC = x'B206' {S 10-35} {SET CPU TIMER } %const %integer SPT = x'B208' {S 10-35} {SET PREFIX } %const %integer SPX = x'B210' {S 10-36} {SET PROGRAM MASK } %const %integer SPM = x'04' {RR 7-34} {SET PSW KEY FROM ADDRESS } %const %integer SPKA = x'B20A' {S 10-36} {SET SECONDARY ASN } %const %integer SSAR = x'B225' {RRE 10-37} {SET STORAGE KEY } %const %integer SSK = x'08' {RR *370*} {SET STORAGE KEY EXTENDED } %const %integer SSKE = x'B22B' {RRE 10-40} {SET SYSTEM MASK } %const %integer SSM = x'80' {S 10-40} {SHIFT AND ROUND DECIMAL } %const %integer SRP = x'F0' {SS C 8-10} {SHIFT LEFT DOUBLE LOGICAL } %const %integer SLDL = x'8D' {RS 7-35} {SHIFT LEFT DOUBLE } %const %integer SLDA = x'8F' {RS C 7-34} {SHIFT LEFT SINGLE LOGICAL } %const %integer SLL = x'89' {RS 7-36} {SHIFT LEFT SINGLE } %const %integer SLA = x'8B' {RS C 7-35} {SHIFT RIGHT DOUBLE } %const %integer SRDA = x'8E' {RS C 7-36} {SHIFT RIGHT DOUBLE LOGICAL } %const %integer SRDL = x'8C' {RS 7-36} {SHIFT RIGHT SINGLE LOGICAL } %const %integer SRL = x'88' {RS 7-37} {SHIFT RIGHT SINGLE } %const %integer SRA = x'8A' {RS C 7-37} {SIGNAL PROCESSOR } %const %integer SIGP = x'AE' {RS C 10-41} {START INTERPRETIVE EXECUTION } %const %integer SIE = x'B214' {S 10-xx} {START I/O } %const %integer SIO = x'9C00' {S C *370*} {START I/O FAST RELEASE } %const %integer SIOF = x'9C01' {S C *370*} {START SUBCHANNEL } %const %integer SSCH = x'B233' {S C 14-11} {STORE } %const %integer ST = x'50' {RX 7-37} {STORE (LONG) } %const %integer STD = x'60' {RX 9-14} {STORE (SHORT) } %const %integer STE = x'70' {RX 9-14} {STORE CHANNEL ID } %const %integer STIDC = x'B203' {S C *370*} {STORE CHANNEL PATH STATUS } %const %integer STCPS = x'B23A' {S 14-13} {STORE CHANNEL REPORT WORD } %const %integer STCRW= x'B239' {S C 14-13} {STORE CHARACTER } %const %integer STC = x'42' {RX 7-38} {STORE CHARACTERS UNDER MASK } %const %integer STCM = x'BE' {RS 7-38} {STORE CLOCK } %const %integer STCK = x'B205' {S C 7-38} {STORE CLOCK COMPARATOR } %const %integer STCKC= x'B207' {S 10-42} {STORE CONTROL } %const %integer STCTL= x'B6' {RS 10-42} {STORE CPU ADDRESS } %const %integer STAP = x'B212' {S 10-43} {STORE CPU ID } %const %integer STIDP= x'B202' {S 10-43} {STORE CPU TIMER } %const %integer STPT = x'B209' {S 10-43} {STORE HALFWORD } %const %integer STH = x'40' {RX 7-39} {STORE MULTIPLE } %const %integer STM = x'90' {RS 7-39} {STORE PEFIX } %const %integer STPX = x'B211' {S 10-44} {STORE SUBCHANNEL } %const %integer STSCH= x'B234' {S C 14-14} {STORE THEN AND SYSTEM MASK } %const %integer STNSM= x'AC' {SI 10-44} {STORE THEN OR SYSTEM MASK } %const %integer STOSM= x'AD' {SI 10-44} {SUBTRACT } %const %integer SR = x'1B' {RR C 7-40} {SUBTRACT } %const %integer S = x'5B' {RX C 7-40} {SUBTRACT DECIMAL } %const %integer SP = x'FB' {SS C 8-11} {SUBTRACT HALFWORD } %const %integer SH = x'4B' {RX C 7-40} {SUBTRACT LOGICAL } %const %integer SL = x'5F' {RX C 7-40} {SUBTRACT LOGICAL } %const %integer SLR = x'1F' {RR C 7-40} {SUBTRACT NORMALISED (EXTENDED) } %const %integer SXR = x'37' {RR C 9-14} {SUBTRACT NORMALISED (LONG) } %const %integer SD = x'6B' {RX C 9-14} {SUBTRACT NORMALISED (SHORT) } %const %integer SER = x'3B' {RR C 9-14} {SUBTRACT NORMALISED (LONG) } %const %integer SDR = x'2B' {RR 9-14} {SUBTRACT NORMALISED (SHORT) } %const %integer SE = x'7B' {RX C 9-14} {SUBTRACT UNNORMALISED (SHORT) } %const %integer SUR = x'3F' {RR C 9-15} {SUBTRACT UNNORMALISED (LONG) } %const %integer SWR = x'2F' {RR C 9-15} {SUBTRACT UNNORMALISED (LONG) } %const %integer SW = x'6F' {RX C 9-15} {SUBTRACT UNNORMALISED (SHORT) } %const %integer SU = x'7F' {RX C 9-15} {SUPERVISOR CALL } %const %integer SVC = x'0A' {RR 7-41} {TEST AND SET } %const %integer TS = x'93' {S C 7-41} {TEST BLOCK } %const %integer TB = x'B22C' {RRE C 10-45} {TEST CHANNEL } %const %integer TCH = x'9F00' {S C *370*} {TEST I/O } %const %integer TIO = x'9D00' {S C *370*} {TEST PENDING INTERRUPTION } %const %integer TPI = x'B236' {S C 14-15} {TEST PROTECTION } %const %integer TPROT= x'E501' {SSE C 10-47} {TEST SUBCHANNEL } %const %integer TSCH = x'B235' {S C 14-16} {TEST UNDER MASK } %const %integer TM = x'91' {SI C 7-42} {TRACE } %const %integer TRACE= x'99' {RS 10-48} {TRANSLATE } %const %integer TR = x'DC' {SS 7-42} {TRANSLATE AND TEST } %const %integer TRT = x'DD' {SS C 7-43} {UNPACK } %const %integer UNPK = x'F3' {SS 7-44} {ZERO AND ADD } %const %integer ZAP = x'F8' {SS C 8-11}